FPGA Engineer

Job Summary

We are seeking a highly experienced Senior FPGA Designer with 10+ years of expertise in Xilinx FPGA development, HDL architecture, and AI acceleration. This role focuses on vision-based machine learning applications, leveraging Xilinx Versal ACAP, Vitis AI, and high-performance FPGA architectures for real-time image processing, deep learning inference, and adaptive computing. The ideal candidate should have extensive experience in CMOS image sensor integration, real-time vision pipelines, and high-speed data interfaces, along with strong HDL coding (VHDL/Verilog/SystemVerilog), multi-clock domain design, and FPGA-based AI acceleration.

Key Responsibilities

• Architect and implement FPGA-based vision processing pipelines for real-time computer vision and AI-driven imaging applications.
• Integrate CMOS image sensors (MIPI CSI-2, LVDS, sub-LVDS, SLVS-EC, GigE Vision) with Xilinx FPGAs for real-time image capture and processing.
• Develop and optimize HDL (VHDL/Verilog/SystemVerilog) designs for FPGA-based AI acceleration and image processing.
• Utilize Vitis AI and HLS (High-Level Synthesis) to accelerate deep learning models for real-time object detection, classification, and tracking.
• Design and manage multi-clock domain architectures, ensuring proper synchronization and handling of clock domain crossings (CDC).
• Optimize timing closure, resource utilization, and power efficiency in FPGA-based imaging systems.
• Perform functional and timing verification using Vivado Simulator, ModelSim, QuestaSim, and static timing analysis.
• Develop custom hardware accelerators for vision processing, including image enhancement, feature extraction, and CNN-based inference.
• Work with high-speed data interfaces, such as MIPI CSI-2, DisplayPort, HDMI, PCIe, DDR4/5, and Ethernet, for high-bandwidth imaging applications.
• Implement real-time image preprocessing techniques (denoising, HDR, color correction, ISP pipelines) on FPGA.
• Debug and optimize sensor-to-FPGA data paths for low-latency image processing.
• Collaborate with AI, embedded software, and hardware teams to deploy FPGA-based vision and machine learning applications.
• Utilize ILA, Chipscope, for real-time debugging and performance tuning.
• Stay ahead of emerging trends in FPGA-based AI acceleration, vision processing, and adaptive computing.

Requirements

Required Qualifications

• Bachelor’s/Master’s in electrical engineering, Computer Engineering, or related field.
• 10+ years of hands-on FPGA design experience, specializing in Xilinx FPGAs, Vivado, and Versal ACAP.
• Expertise in HDL programming (VHDL/Verilog/SystemVerilog) for real-time image processing pipelines.
• Extensive experience with CMOS image sensors, including MIPI CSI-2, SLVS-EC, LVDS, and GigE Vision.
• Deep understanding of AI/ML vision models (CNNs, RNNs, Transformers) and FPGA-based AI acceleration.
• Hands-on expertise in Vitis AI and HLS for deep learning inference on FPGA.
• Experience with multiple clock domains, CDC techniques, and metastability resolution.
• Strong knowledge of real-time imaging applications, including HDR, ISP, and sensor fusion.
• Experience with high-speed serial interfaces (PCIe, DDR4/5, Ethernet, HDMI, DisplayPort, etc.).
• Strong debugging and optimization skills, including power and thermal-aware FPGA design.

Preferred Qualifications

• Experience with Xilinx DPU (Deep Learning Processing Unit) and AI inference frameworks (TensorFlow, PyTorch, ONNX, etc.).
• Knowledge of Linux/PetaLinux, RTOS, and embedded system integration.
• Proficiency in Python, TCL, or C/C++ for FPGA automation, AI pipeline development, and hardware-software co-design.
• Familiarity with Git, Jenkins, and CI/CD methodologies for FPGA development workflows.

If you are passionate about FPGA-based vision processing, AI acceleration, and next-generation adaptive computing, we encourage you to apply and lead the future of real-time machine learning on FPGAs!

Benefits

All benefits start on first day of employment!

• 75% employer-paid medical for employee. Family coverage also included.
• 100% employer paid dental, and vision for employee and dependents
• 100% employer paid long-term, short-term disability, and life insurance policy
• 401k Match, if you’re contributing 5% we match 4%. 100% vested immediately.
• 10 paid holidays
• Starting at 15 days paid PTO (inclusive of sick and vacation time) annually
• Employee Assistance Program (EAP)
• Flexible Spending Account (FSA)

EEOC Statement:

Planar is an equal opportunity employer, we believe in fostering a culture of equality, diversity, and inclusivity. Our commitment to this goal is clearly expressed in our zero-tolerance policy for discrimination and harassment of any kind, including on the basis of race, color, sex, age, religion, sexual orientation, national origin, disability, genetic information, pregnancy, protected veteran status or any other characteristic protected by applicable federal, state, or local laws. Our hiring practices ensure that decisions are based solely on qualifications, merit, and current business needs, while extending to all aspects of our operations – from recruitment and promotion to layoff and recall, to leave of absence, compensation, benefits, and training.  We are committed to remaining a drug free workplace