ML Silicon Performance Architect

We are looking for a Silicon Performance Architect who will work with a group of researchers and engineers. This ideal candidate will understand the full spectrum of silicon performance, analysis, and projections from algorithms on generic compute units to custom silicon IP blocks, traditional compute benchmarking, and SOC and System level implications.ML Silicon Performance Architect Responsibilities

• Define performance architecture that includes functions such as ML compute, CPU/DSP/Accelerator benchmarking, throughput and QoS analysis, performance architectures and detailed modeling and analysis.
• Surpass state-of-the-art for metrics such as compute, bandwidth and power consumption.
• Work across disciplines, brainstorm big ideas, build new methodologies, juggle/coordinate multiple initiatives, drive a concept into a prototype and ultimately guide the transition into a high-volume consumer product.
• Understand the tradeoffs between general purpose and custom compute mechanisms, be able to model data-flows, and create detailed cost/benefit analysis.
• Work with other Architects in undertaking performance analysis, modeling, and projections. Produce detailed documents and SystemC models matching the proposed ASIC implementation, and perform detailed tradeoff analyses for executive review and product roadmap decisions.
• Plan and document the Performance test plan for silicon.

Minimum Qualifications

• 7+ years of experience with production silicon.
• 2+ years of experience with methods for partitioning a solution across hardware and software, digital, and other multi-disciplinary boundaries in a system solution.
• 2+ years of experience evaluating architectural trade-offs of performance, power, and area.
• Experience employing scientific methods to debug, diagnose and drive the resolution of cross-disciplinary system issues.
• MS EE/CS or equivalent experience.
• Bachelor’s degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

Preferred Qualifications

• Experience in top down high-level-model to HW mapping.
• Experience in SystemC/TLM2 performance modeling.
• Experience with cycle-accurate full-system SoC performance model environments.
• Experience with state-of-the-art pre-silicon power estimation methodologies.
• Experience in custom IP block performance estimates.
• Experience programming in C/C++.
• Experience working effectively as an individual and in a multidisciplinary team.
• Experience with ambiguity with a fast changing consumer electronics field.
• Results oriented, self-motivated, proactive with demonstrated creative & critical thinking.
• Experience collaborating and/or lead in a team environment.

For those who live in or expect to work from California if hired for this position, please click here for additional information. LocationsAbout Meta Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
$212,000/year to $291,000/year + bonus + equity + benefits

Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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